False Sharing

False sharing is a performance-degrading condition where threads on different processors modify variables that happen to reside on the same cache line. The hardware cache coherency protocol treats these as a conflict, forcing constant updates and invalidations that kill performance.

In a multi-threaded matching engine, this can cause significant latency spikes that are difficult to debug. By padding data structures to ensure that threads operate on different cache lines, developers can eliminate this issue.

It is a classic example of how hardware architecture dictates the design of concurrent software in finance.